tei-fabric v0.1

Run teiOS. Own no hardware.

Pick a substrate, run a real workload through the real runtime, and read the energy honestly. We report three numbers and never blur them: what the work would cost on the target chip, what the simulator measured running it, and the real energy the host machine burned to do the simulating. The host is a stand-in for TEI silicon — its joules are real, but they are not the target’s.

Three tiers, never conflated. The host figure estimates the target only after a characterized stand-in→target correction.

Run a workload to see the ladder.

From a measured stand-in to a target estimate.

A rented FPGA is the one fabric that runs your actual datapath and reports real energy. It is not the target chip — hardened silicon is more efficient — so we de-rate the measured FPGA energy to the target with published bounds and a citation. Digital datapaths only; analog substrates have no honest FPGA stand-in, and the calculator says so.

Enter a measured FPGA energy to derive a target estimate.